NXP Semiconductors /LPC43xx /MCPWM /INTEN_SET

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Interpret as INTEN_SET

Description

Interrupt Enable set address

Fields

ILIM0_SET	Writing a one sets the corresponding bit in INTEN, thus enabling the interrupt.
IMAT0_SET	Writing a one sets the corresponding bit in INTEN, thus enabling the interrupt.
ICAP0_SET	Writing a one sets the corresponding bit in INTEN, thus enabling the interrupt.
RESERVED	Reserved.
ILIM1_SET	Writing a one sets the corresponding bit in INTEN, thus enabling the interrupt.
IMAT1_SET	Writing a one sets the corresponding bit in INTEN, thus enabling the interrupt.
ICAP1_SET	Writing a one sets the corresponding bit in INTEN, thus enabling the interrupt.
RESERVED	Reserved.
ILIM2_SET	Writing a one sets the corresponding bit in INTEN, thus enabling the interrupt.
IMAT2_SET	Writing a one sets the corresponding bit in INTEN, thus enabling the interrupt.
ICAP2_SET	Writing a one sets the corresponding bit in INTEN, thus enabling the interrupt.
RESERVED	Reserved.
ABORT_SET	Writing a one sets the corresponding bit in INTEN, thus enabling the interrupt.
RESERVED	Reserved.

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